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OnTAP Series 4000 Product Overview.pdf

Memory-Cluster-Testing-Overview.pdf

Preview of onTAP Series 4000 Product Overview

🔗 Source: flynnsystems.com

📊 Size: 488 KB

👤 Author: Wendy Harrison

⬇️ Downloads: 318

Summary

Flynn Systems' onTAP Series 4000 offers memory and cluster testing capabilities, enabling connectivity checks between boundary scan and non-JTAG logic. Key features include:

- High-level Modeling: Uses DTS, a high-level modeling language, to create reusable test models for memory and other logic types.
- Non-JTAG Testing: Develops test models with a C-like flow in DTS, independent of boundary scan implementation details.
- Virtual Nails: Automatically associates boundary scan pins with non-JTAG device pins, serializing test vectors into scans.
- JTAG Controller Compatibility: Runs with onTAP JTAG Controller (standard or low voltage) at up to 10MHz clock rates through programming cables.
- External Control: Allows control of critical pins, such as Write Enable pins, when accessible.
- Compilation & Mapping: Compiles DTS models into SVF files, mapping Boundary Scan pins to Memory/Cluster test device pins using "Virtual Pins".
- Example DTS Model: Provided for setting and testing pin values on non-JTAG logic, demonstrating C-like expressions and flow control.

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Description

Memory and cluster testing tests connectivity between boundary scan pins and non-JTAG logic. Reusable test models are created in DTS, a high-level modeling language. onTAP's Virtual Nails serializes test vectors into scans and associates boundary scan pins with non-JTAG device pins.

Technical Information

File Format: PDF
File Size: 488 KB
Pages: 2
Language: EN
Author: Wendy Harrison
Total Downloads: 318
Last Updated: 1 week ago

Document Overview

This PDF document about onTAP Series 4000 Product Overview provides comprehensive information and guidance. Whether you're a beginner or advanced user, this resource offers valuable insights into onTAP Series 4000 Product Overview.