PolySA: Polyhedral-Based Systolic Array Auto-Compilation.pdf

polysa_iccad18.pdf
Preview of PolySA: Polyhedral-Based Systolic Array Auto-Compilation
🔗 Source: vast.cs.ucla.edu
📊 Size: 2.72 MB
👤 Author: Jason Cong, Jie Wang
⬇️ Downloads: 159

Summary

PolySA is a polyhedral-based systolic array auto-compilation framework that generates high-performance systolic array architectures on FPGAs. It takes in applications written in C/C++ and performs mapping based on polyhedral IR, generating off-the-shelf FPGA IPs without user intervention. PolySA leverages the polyhedral framework to support various schedulings and efficient transformations, making it the first end-to-end compilation framework for systolic array architecture on FPGAs. It demonstrates a reduction in development cycles from several months to within one hour and generates high-performance designs with a performance gap within 31% compared to state-of-the-art manual designs for applications like matrix multiplication and convolutional neural networks.

Description

PolySA is a polyhedral-based systolic array auto-compilation framework that generates high-performance systolic array architectures on FPGAs.

Technical Information

  • File Format: PDF
  • File Size: 2.72 MB
  • Pages: 8
  • Language: EN
  • Author: Jason Cong, Jie Wang
  • Total Downloads: 159
  • Last Updated: 5 days ago

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