RISC-V Case.pdf

The authors argue that instruction set architectures (ISAs) should be free and open, just like open-source software. Proprietary ISAs, such as ARM and x86, stifle competition and innovation, and there is no good technical reason for them to be proprietary. The authors propose that a free, open ISA would enable a real free open market of processor designs, leading to greater innovation, shared open core designs, and processors becoming affordable for more devices.

The authors make the case for RISC (Reduced Instruction Set Computing) as the free, open ISA style, citing its proven commercial record and dominance in the post-PC era. They also highlight the importance of learning from past mistakes and including features that match embedded market needs.

The authors identify three existing RISC free, open ISAs: SPARC V8, OpenRISC, and RISC-V. They argue that it is wiser to start with an existing ISA rather than forming committees and starting from scratch. To rank the choices, they project the future IT landscape, which will likely be dominated by three platforms: IoTs, personal mobile devices, and Warehouse-Scale Computers (WSCs).

The authors identify four key requirements for a free, open ISA:

1. Base-plus-extension ISA to improve efficiency and reduce costs.
2. A small core set of instructions that compilers and OS's can depend upon.
3. Standard but optional extensions for common ISA additions.
4. A single ISA design that can be used everywhere.

They conclude that a free, open ISA would benefit the industry, enabling greater innovation, shared open core designs, and processors becoming affordable for more devices, which could lead to the expansion of the Internet of Things (IoT) and other applications.