PA-RISC 2.0 Firmware Architecture Reference Specification Version 1.0.pdf

pdc20-v1.0-Ch4-procs.pdf
Preview of PA-RISC 2.0 Firmware Architecture Reference Specification Version 1.0
🔗 Source: ftp.parisc-linux.org
📊 Size: 365 KB
📄 Pages: 100 pages
⬇️ Downloads: 636

Summary

Overview:
The PA-RISC 2.0 firmware architecture incorporates Processor-Dependent Code (PDC) procedures for handling processor-specific operations. These procedures provide a standardized interface to access and characterize processor-dependent hardware, ensuring consistency across different processors.

Key Points:

1. PDC Mechanism: PDC is implemented via software entry points offering various options to execute specific procedures. It can be facilitated by PA-RISC code in ROM or supported by specialized hardware. Any combination of code and hardware can perform these operations.

2. Per-Processor Resource: PDC is processor-specific, requiring operating system (OS) software to manage separate pointers for each processor. The address of the PDCEPROC entry point is stored in MEMPDC for the monarch processor and passed in GR26 during OS initialization for non-monarch processors.

3. Procedure Options: Various PDC procedures are selected by the index ARG0 in the call to PDCE_PROC. A table listing all architected PDC procedures is provided, followed by detailed specifications for each procedure.

4. Calling Conventions:
- PDC procedures follow a subset of the 64-Bit Runtime Architecture for PA-RISC 2.0 calling convention, allowing high-level language code to call them.
- Indirect calls through stubs might be required if the convention changes in future updates.
- Procedures called while the OS controls the system should be loaded into memory; only I/O space entry points should run from ROM.

5. Processor State Requirements:
- The processor must be at Privilege Level 0 throughout the PDC procedure call.
- The IVT is defined by the caller and must remain unchanged during the procedure.
- Specific requirements are defined for the PSW (Processor Status Word) bits, ensuring they maintain consistent states on entry and exit.

6. System-Wide Resources: Some PDC resources are system-wide, requiring each processor module to return a consistent value when accessed.

7. Compatibility: The execution of non-architected PDC procedures should not affect the architected operation of modules, and vice versa. These procedures must also not call IODC entry points.

Description

The PA-RISC 2.0 Firmware Architecture specification is subject to change without notice. Hewlett-Packard disclaims all warranties and liabilities for errors or damages resulting from its use. The document contains proprietary information protected by copyright.

Technical Information

  • File Format: PDF
  • File Size: 365 KB
  • Pages: 100
  • Language: EN
  • Total Downloads: 636
  • Last Updated: 2 hours ago

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